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Analog IPs
There are various
aspects of developing an analog IP. Obviously the most important
aspect is the required functionality. Functionality is an essential
but not sufficient requirement of a good IP. Ease of reuse, integration,
immunity to interference and testability are other important aspects
of and in IP. We make sure that all aspects are covered adequately.
We have experience in developing Low voltage, low power and high performance
IPs in leading edge 65nm and 90nm CMOS technologies. Areas
of expertise
- Phase
Lock Loops – up to 5.8 GHz
- Operational
Amplifiers – Single ended, fully differential and Sample
& Hold
- ADC
- SAR architecture 8 and 10 bits, Pipelined Architecture -10 bit
- DAC
– Current steering Architecture – 10 bits, Interpolating
Architecture – 8 bits
- High
performance IOs – LVDS, GTL, LVTTL, LVCMOS, PECL, HSTL,
SSTL and CML
Analog Standard Cell Library
Our
solution provides capability of integrating various analog functions
efficiently somewhat similar to standard digital cells. Additionally
we have an option for “in-field” built-in programmability
for certain parameters. Power down and testability is an integral
part of the library components making it a lot easier for top level
integration.
Typical
Analog Standard cell library components :
- Oscillators
- Op-Amps
- Comparators
- Bias
current generators
- Reference
voltage generators
- High
Speed IOs
Turnkey solutions
Depending
on your needs and product requirements, we can work with you to
appropriately partition the Mix-Signal IPs and functions. We will
then work with you, throughout the product development cycle, to
provide solution(s) that is (are) easy to integrate, without any
worries of performance degradation due the issues related to integration
of mix-signal IPs & functions. You can treat the mix-signal
functions as black box(s), with some constraints – off course,
and finish the top level integration, verification and performance
evaluation in a timely manner.
It is up
to you to outsource any aspect of design that you feel will reduce
the oval risk and expedite the product development cycle.
We
become part of your extended design team and your success is our
success.
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